Memory management: paging, segmentation
Operating Systems · Engineering
Study notes
A 32-bit address with 4KB pages: top 20 bits are the page number, low 12 bits the offset. Virtual address 0x12345678: page 0x12345, offset 0x678. The page table maps page 0x12345 to frame 0x00ABC; physical address = 0x00ABC678. The TLB caches this so most accesses skip the table walk.