Worked example: Build an OR gate using only NAND gates. Step 1: A NAND gate gives ¬(A · B). If we tie both inputs of a NAND together (A = B), we get ¬(A · A) = Ā — a NOT gate. So each input first passes through a NAND-as-NOT: A becomes Ā and B becomes B̄. Step 2: Feed Ā and B̄ into a third NAND: Y = ¬(Ā · B̄). Step 3: Use De Morgan's law: ¬(Ā · B̄) = A + B. That is exactly the OR function. So the OR gate = three NAND gates. Count the gates: 2 as inverters + 1 final = 3 NAND gates. Similarly, an AND gate needs only two NAND gates: one NAND followed by a NAND-as-NOT.